.syntax unified
.include "regs.asm"

.global isr


//.org 0x08004000
isr:
	push    {r7}
	add     r7, sp, #0

    //Pend bit lschen
    ldr r1,=nvic
	ldr r2,=0x0100
	str r2,[r1,#isrClrReg]

	mov     sp, r7
	pop     {r7}
	bx lr

.end
